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T-Kernel/µITRON-based system development suite


eBinder for Power Architecture


Overview

Power Architecture ™ is a high-performance processor ideal for telecommunication equipment used in the infrastructure. For their next-generation products, more and more OEMs are shifting from their legacy systems based on other CPU architectures to Power Architecture, mainly for performance reasons.

eBinder for Power Architecture provides everything developers need, from a real-time operating system, a thread-safe C/C++ library as well as middleware libraries, to integrated development environments including a GNU cross compiler, a source-level task-aware remote debugger, and performance analysis tools.





Operating environment

Target environment

Item Description
CPU PowerQUICC II Pro (MPC83xx (603e Core))
Compiler Supports the following compiler:
* GNU C/C++
BSP Supports the following boards:
* MPC8349EMDS (with MPC8349)
[Freescale Semiconductor]
* The supported compiler and OS vary by BSP. Check the BSP list for details.
BSP list
* An unsupported or customized board can be supported by BSP customization. Contact us for details.


Host environment

Item Description
OS Windows 2000
Windows XP Service Pack 2 or above
CPU 800MHz CPU
1GHz or more recommended
Memory 512MB
768MB or more recommended
Disk 768MB or more free space
(More space may be necessary depending on cluster size)
Monitor resolution 800 x 600, 256 colors
1024 x 768 or higher recommended
Others CD-ROM drive
Pointing device such as a mouse
Interface to connect to a target (depends on selected debug port)

* Serial port
* Ethernet port

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Click here for information on customization or contract development.

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Product Line
eBinder for ARM
eBinder for MIPS
eBinder for Power Architecture
eBinder for SH
Option: JTAG support
Option: Instruction Set Simulator
Option: Software Component Packaging Tool
Option: Multi-target Debug
Option: Multi-core Debug